How to: integrate a third-party accelerator (e.g. NVDLA)
Tutorial guide:
What you will learn
- Integrate a third-party accelerator in ESP
- Design and test on FPGA SoCs that include multiple instances of a third-party accelerator
- Case study: integration of the NVIDIA Deep Learning Accelerator (NVDLA)
What you will need
- Prerequisites
- Equipment
- One of the supported FPGA boards (see homepage)
- (optional) An internet router
What you can read
Accelerator Integration for Open-Source SoC Design
Davide Giri, Kuan-lin Chiu, Guy Eichler, Paolo Mantovani, Luca P. Carloni
IEEE Micro (Special Issue: FPGAs in Computing), 2021
Ariane + NVDLA: Seamless Third-Party IP Integration with ESP
Davide Giri, Kuan-lin Chiu, Guy Eichler, Paolo Mantovani, Nandhini Chandramoorthy, Luca P. Carloni
Workshop on Computer Architecture Research with RISC-V (CARRV), 2020
What you can contribute
The ESP team welcomes external contributions and collaborations on a variety of topics including but not limited to:
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Integrating a new third-party accelerator in ESP
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Design new bus adapters for the third-party accelerator tile
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Improve the NVDLA runtime application (e.g. work on batches of images, parallelize the work on multiple instances of NVDLA)
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Compile NVDLA loadables for new networks
Check out our contributing guidelines.