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Publications

Research on and with the ESP platform

The overview paper Agile SoC Development with Open ESP is the recommended reference for ESP.

Overview paper

Agile SoC Development with Open ESP

Paolo Mantovani, Davide Giri, Giuseppe Di Guglielmo, Luca Piccolboni, Joseph Zuckerman, Emilio G. Cota, Michele Petracca, Christian Pilato, Luca P. Carloni

(Invited) IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2020

Paper Pitch video Video

ESP chips

A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management, and Flexible NoC-Based Data Orchestration

Maico Cassel dos Santos, Tianyu Jia, Joseph Zuckerman, Martin Cochet, Davide Giri, Erik Jens Loscalzo, Karthik Swaminathan, Thierry Tambe, Jeff Jun Zhang, Alper Buyuktosunoglu, Kuan-Lin Chiu, Giuseppe Di Guglielmo, Paolo Mantovani, Luca Piccolboni, Gabriele Tombesi, David Trilla, En-Yu Yang, John-David Wellman, Aporva Amarnath, Ying Jing, Bakshree Mishra, Joshua Park, Vignesh Suresh, Sarita Adve, Pradip Bose, David Brooks, Luca Carloni, Kenneth Shepard, Gu-Yeon Wei

Proceedings of the International Solid-State Circuits Conference (ISSCC), 2024

Paper

A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous IP Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC

Tianyu Jia, Paolo Mantovani, Maico Cassel Dos Santos, Davide Giri, Joseph Zuckerman, Erik Jens Loscalzo, Martin Cochet, Karthik Swaminathan, Gabriele Tombesi, Jeff Jun Zhang, Nandhini Chandramoorthy, John-David Wellman, Kevin Tien, Luca Carloni, Kenneth Shepard, David Brooks, Gu-Yeon Wei, Pradip Bose

Proceedings of the European Conference on Solid-State Circuits (ESSCIRC), 2022

Paper

Papers about ESP

SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs

Gabriele Tombesi, Joseph Zuckerman, Paolo Mantovani, Davide Giri, Maico Cassel Dos Santos, Tianyu Jia, David Brooks, Gu-Yeon Wei, and Luca P. Carloni

IEEE Design & Test (Special Issue: NOCS), 2023

Paper Slides

PR-ESP: An Open-Source Platform for Design and Programming of Partially Reconfigurable SoCs

Biruk Seyoum, Davide Giri, Kuan-Lin Chiu, B. Natter, and Luca Carloni

Design, Automation and Test in Europe Conference (DATE), 2023

Paper

A Scalable Methodology for Agile Chip Development with Open-Source Hardware Components

Maico Cassel dos Santos, Tianyu Jia, Martin Cochet, Karthik Swaminathan, Joseph Zuckerman, Paolo Mantovani, Davide Giri, Jeff Jun Zhang, Erik Jens Loscalzo, Gabriele Tombesi, Kevin Tien, Nandhini Chandramoorthy, John-David Wellman, David Brooks, Gu-Yeon Wei, Kenneth Shepard, Luca P. Carloni, and Pradip Bose

Proceedings of the IEEE International Conference on Computer-Aided Design (ICCAD), 2022

Paper Slides Video

Enabling Heterogeneous, Multicore SoC Research with RISC-V and ESP

Joseph Zuckerman, Paolo Mantovani, Davide Giri, Luca P. Carloni

Workshop on Computer Architecture Research with RISC-V (CARRV), 2022

Paper

Cohmeleon: Learning-Based Orchestration of Accelerator Coherence in Heterogeneous SoCs

Joseph Zuckerman, Davide Giri, Jihye Kwon, Paolo Mantovani, Luca P. Carloni

IEEE/ACM International Symposium on Microarchitecture (MICRO), 2021

Paper Pitch video Video

Accelerator Integration for Open-Source SoC Design

Davide Giri, Kuan-lin Chiu, Guy Eichler, Paolo Mantovani, Luca P. Carloni

IEEE Micro (Special Issue: FPGAs in Computing), 2021

Paper Tutorial

Scalable Open-Source System-on-Chip Design

Luca P. Carloni

(Invited Talk - Extended Abstract) IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2020

Paper

Design and Integration of a Debug Unit for Heterogeneous System-on-Chip Architectures

Gabriele Tombesi, Advisors: Luciano Lavagno, Luca P. Carloni

Master’s Thesis, Politecnico di Torino, 2020

Thesis

Ariane + NVDLA: Seamless Third-Party IP Integration with ESP

Davide Giri, Kuan-lin Chiu, Guy Eichler, Paolo Mantovani, Nandhini Chandramoorthy, Luca P. Carloni

Workshop on Computer Architecture Research with RISC-V (CARRV), 2020

Paper Slides Video Tutorial

ESP4ML: Platform-Based Design of Systems-on-Chip for Embedded Machine Learning

Davide Giri, Kuan-lin Chiu, Giuseppe Di Guglielmo, Paolo Mantovani, Luca P. Carloni

(Best Paper Nominee) Design, Automation and Test in Europe Conference (DATE), 2020

Paper Slides Video Tutorial

Runtime Reconfigurable Memory Hierarchy in Embedded Scalable Platforms

Davide Giri, Paolo Mantovani, Luca P. Carloni

(Invited) Asia and South Pacific Design Automation Conference (ASPDAC), 2019

Paper Slides

Accelerators and Coherence: An SoC Perspective

Davide Giri, Paolo Mantovani, Luca P. Carloni

IEEE Micro (Special Issue: Hardware Acceleration), 2018

Paper

NoC-Based Support of Heterogeneous Cache-Coherence Models for Accelerators

Davide Giri, Paolo Mantovani, Luca P. Carloni

IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 2018

Paper Slides Poster

Scalable System-on-Chip Design

Paolo Mantovani, Advisor: Luca P. Carloni

PhD Thesis, Columbia University, 2017

Thesis

Broadening the Exploration of the Accelerator Design Space in Embedded Scalable Platforms

Luca Piccolboni, Paolo Mantovani, Giuseppe Di Guglielmo, Luca P. Carloni

IEEE High Performance Extreme Computing Conference (HPEC), 2017

Paper

Handling Large Data Sets for High-Performance Embedded Applications in Heterogeneous Systems-on-Chip

Paolo Mantovani, Emilio G. Cota, Christian Pilato, Giuseppe Di Guglielmo, Luca P. Carloni

International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2016

Paper

The Case for Embedded Scalable Platforms

Luca P. Carloni

(Invited) Design Automation Conference (DAC), 2016

Paper

An FPGA-based Infrastructure for Fine-grained DVFS Analysis in High-performance Embedded Systems

Paolo Mantovani, Emilio G. Cota, Kevin Tien, Christian Pilato, Giuseppe Di Guglielmo, Ken Shepard, Luca P. Carloni

Design Automation Conference (DAC), 2016

Paper

High-Level Synthesis of Accelerators in Embedded Scalable Platforms

Paolo Mantovani, Giuseppe Di Guglielmo, Luca P. Carloni

(Invited) Asia and South Pacific Design Automation Conference (ASPDAC), 2016

Paper

Papers that use ESP

SpikeHard: Efficiency-Driven Neuromorphic Hardware for Heterogeneous Systems-on-Chip

Judicael Clair, Guy Eichler, and Luca P. Carloni

Proceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2023

Paper Slides

An Analysis of Accelerator Data-Transfer Modes in NoC-Based SoC Architectures

Kuan-Lin Chiu, Davide Giri, Luca Piccolboni and Luca P. Carloni

Proceedings of the IEEE Conference on High Performance Extreme Computing (HPEC), 2023

Paper

MindCrypt: The Brain as a Random Number Generator for SoC-Based Brain-Computer Interfaces

Guy Eichler, Biruk Seyoum, Kuan Lin Chiu, and Luca P. Carloni

Proceedings of the IEEE International Conference on Computer Design (ICCD), 2023

Paper Slides

DECADES: A 67mm2, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET

F. Gao, T.-J. Chang, A. Li, M. Orenes-Vera, D. Giri, P. Jackson, A. Ning, G. Tziantzioulis, Joseph Zuckerman, J. Tu, K. Xu, G. Chirkov, Gabriele Tombesi, J. Balkind, M. Martonosi, L. Carloni, and D. Wentzlaff.

Proceedings of the Custom Integrated Circuits Conference (CICC), 2023

Paper

EigenEdge: Real-Time Software Execution at the Edge with RISC-V and Hardware Accelerators

Kuan-Lin Chiu, Guy Eichler, Biruk Seyoum, and Luca Carloni

Real-time And intelliGent Edge computing workshop (RAGE), 2023

Paper

A 12nm 18.1TFLOPs/W Sparse Transformer Processor with Entropy-Based Early Exit, Mixed-Precision Predication and Fine-Grained Power Management

Thierry Tambe, Jeff Zhang, Coleman Hooper, Tianyu Jia, Paul N. Whatmough, Joseph Zuckerman, Maico Cassel Dos Santos, Erik Jens Loscalzo, Davide Giri, Kenneth Shepard, Luca Carloni, Alexander Rush, David Brooks, and Gu-Yeon Wei

Proceedings of the International Solid-State Circuits Conference (ISSCC), 2023

MasterMind: Many-Accelerator SoC Architecture for Real-Time Brain-Computer Interfaces

Guy Eichler, Luca Piccolboni, Davide Giri, Luca P. Carloni

IEEE International Conference on Computer Design (ICCD), 2021

Paper Slides Video

MosaicSim: A Lightweight, Modular Simulator for Heterogeneous Systems

Opeoluwa Matthews, Aninda Manocha, Davide Giri, Marcelo Orenes-Vera, Esin Tureci, Tyler Sorensen, Tae Jun Ham, Juan L. Aragon, Luca P. Carloni, Margaret Martonosi

(Best Paper Nominee) IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2020

Paper

PAGURUS: Low-Overhead Dynamic Information Flow Tracking on Loosely Coupled Accelerators

Luca Piccolboni, Giuseppe Di Guglielmo, Luca P. Carloni

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2018

Paper Poster Slides

System-Level Design of Networks-on-Chip for Heterogeneous Systems-on-Chip

Young Jin Yoon, Paolo Mantovani, Luca P. Carloni

(Invited) IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 2017

Paper

Other relevant papers

Teaching Heterogeneous Computing with System-Level Design Methods

Luca P. Carloni, Emilio G. Cota, Giuseppe Di Guglielmo, Davide Giri, Jihye Kwon, Paolo Mantovani, Luca Piccolboni, Michele Petracca

Workshop on Computer Architecture Education (WCAE), 2019

Paper

From Latency-Insensitive Design to Communication-Based System-Level Design

Luca P. Carloni

The Proceedings of the IEEE, Vol. 103, No. 11, November 2015

Paper